FPGA Clock standalone, DCF77 or better.. wireless GPS NMEA 433Mhz or both ?

<p>A clock design in a FPGA written mostly in VHDL. I have two designs available. Both are synthesized to a Altera MAX FPGA EPM1270T144C5, JTAG programmable, Quartus Design and simulated in Modelsim, but most of it will be portable to other FPGA&#39;s Currently there is a standalone clock in a FPGA written in VHDL blocks that can be synchronized with DCF77 and set manually.